Module prim_secded_inv_28_22_dec

prim_secded_inv_28_22_dec u_prim_secded_inv_28_22_dec ( .data_i(data_i), .data_o(data_o), .syndrome_o(syndrome_o), .err_o(err_o) );

Block Diagram of prim_secded_inv_28_22_dec

SECDED decoder generated by util/design/secded_gen.py

Ports

Name	Type	Direction	Description
data_i	wire logic [27 : 0]	input
data_o	var logic [21 : 0]	output
syndrome_o	var logic [5 : 0]	output
err_o	var logic [1 : 0]	output

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