Entity xil_BSCAN

Block Diagram of xil_BSCAN

This module wraps Xilinx "Boundary Scan" (JTAG) primitives in a generic module. |br| Supported devices are:

• Spartan-3, Spartan-6

• Virtex-5, Virtex-6

• Series-7 (Artix-7, Kintex-7, Virtex-7, Zynq-7000)

Generics

Name	Type	Default	Description
JTAG_CHAIN	natural
DISABLE_JTAG	boolean	FALSE

Ports

Name	Type	Direction	Description
Reset	std_logic	out
RunTest	std_logic	out
Sel	std_logic	out
Capture	std_logic	out
drck	std_logic	out
Shift	std_logic	out
Test_Clock	std_logic	out
Test_DataIn	std_logic	out
Test_DataOut	std_logic	in
Test_ModeSelect	std_logic	out
Update	std_logic	out

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