[source]

Component arith_prefix_or_xilinx

Nx[N - 1 downto 0]std_logic_vectorystd_logic_vector[N - 1 downto 0]

Block Diagram of arith_prefix_or_xilinx

Generics

Name

Type

Initial Value

Description
N

positive
Ports

Name

Direction

Type

Description
x

in

std_logic_vector
y

out

std_logic_vector