Component fifo_cc_got_tempgot
Name |
Type |
Initial Value |
Description |
---|---|---|---|
D_BITS |
positive |
|
|
MIN_DEPTH |
positive |
|
|
DATA_REG |
boolean |
false |
|
STATE_REG |
boolean |
false |
|
OUTPUT_REG |
boolean |
false |
|
ESTATE_WR_BITS |
natural |
0 |
|
FSTATE_RD_BITS |
natural |
0 |
Full State Bits |
Name |
Direction |
Type |
Description |
---|---|---|---|
rst |
in |
std_logic |
|
clk |
in |
std_logic |
|
put |
in |
std_logic |
|
din |
in |
std_logic_vector |
|
full |
out |
std_logic |
|
estate_wr |
out |
std_logic_vector |
|
got |
in |
std_logic |
|
dout |
out |
std_logic_vector |
|
valid |
out |
std_logic |
|
fstate_rd |
out |
std_logic_vector |
|
commit |
in |
std_logic |
|
rollback |
in |
std_logic |
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