Expand .* Port Connections

You can easily expand .* wildcard named port connections to explicit named port connections.

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Place the editor cursor either on a module or interface instance declaration and press Ctrl+1, select Expand .* port connections from the list of quick assist proposals and press Enter.

The .* connections are expanded to named port connections.

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Note

You can customize the look and feel of the explicit named port connections from Window > Preferences > DVT > SystemVerilog > Editor > Content Assist.

Tip

You can also Right+Click in the editor and go to Refactor > Expand .* Port Connections.

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